Main Features about the classes
- Experienced faculty (BITS, VIT, C-DAC, etc.)
- Demo Classes are available.
- Detailed study topic wise.
- Batch Size 3-8.
- Cover all gaps during the regular study.
- Affordable Fee Structure.
- Motivational Lectures.
Engineer classes
(Batch size: maximum 08 students per batch)
(Batch size: maximum 08 students per batch)
- In group fee: 8,000/-per paper
- Individual (Personal coaching) fee: 14,000/- per paper
- All papers for one Semester fee:60,000/- per sem (with passing assurance)
Engineering Diploma
(Batch size: maximum 08 students per batch)
(Batch size: maximum 08 students per batch)
- In group fee: 6,000/- per paper
- Individual (Personal coaching) fee: 10,000/- per paper
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- All papers for one Semester fee:40,000/- per sem (with passing assurance)
on Fast Track
| Analog Circuit | Signal System |
| Math-I, Math-II, Math-III | Control System |
| EME | Microwave Engineering |
| Semiconductor Devices | Integrated Circuit Design |
| Design for Testability (DFT) | C, C++, Java,Computer Graphics |
Under Guidance of
Dr. Sandeep Aggarwal
Ph.D. Electronics, University of Delhi, Delhi, India
His area of research is Semiconductor chip designing. He working as Professor (WILP faculty) at BITS, Pilani since 2015. He is Visiting Faculty in various university and originations like Wipro, Pune; C-DAC, Pune; GUT, Gandhi Nagar; VIT, Vellore; Veltech, Chennai; He had worked as SENIOR DEVICE DESIGN ENGINEER in High Voltage MOSFET R&D Group, Vishay Siliconix. He had worked as Assistant Professor at Guru Gobind Singh Indraprastha University, Delhi (India). He had published 4 patents and 25 technical papers in different international journals. He has worked in MNC as R&D scientist and developed new fabrication techniques.